DocumentCode
880542
Title
A 4096-bit high-speed emitter-coupled-logic (ECL) compatible random-access memory
Author
Ebel, Mark S. ; Gionis, John ; Regitz, William M.
Volume
10
Issue
5
fYear
1975
Firstpage
262
Lastpage
267
Abstract
A 4096-bit pseudostatic MOS random-access memory with emitter-coupled (ECL) compatibility on all inputs including clocks is described. This device exhibits access times of under 80 ns and cycle times of under 150 ns with a standby dissipation of 300 mW. The fully decoded memory is fabricated on a 204/spl times/237 mil silicon chip and is assembled in a 22-lead ceramic dual-in-line package.
Keywords
Current-mode logic; Digital integrated circuits; Monolithic integrated circuits; Random-access storage; Semiconductor storage systems; current-mode logic; digital integrated circuits; monolithic integrated circuits; random-access storage; semiconductor storage systems; Assembly; Ceramics; Circuits; Clocks; Costs; Decoding; Logic devices; Semiconductor device packaging; Silicon; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1975.1050609
Filename
1050609
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