Title :
Elixir: High-Throughput Cost-Effective Dual-Field Processors and the Design Framework for Elliptic Curve Cryptography
Author :
Lai, Jyu-Yuan ; Huang, Chih-Tsun
Author_Institution :
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu
Abstract :
We present a design framework that consists of a high-throughput, parallel, and scalable elliptic curve cryptographic (ECC) processor, and its cost-effectiveness methodology for the design exploration. A two-phase scheduling methodology is proposed to optimize the ECC arithmetic over both GF(p) and GF(2m). Based on the methodology, a parallel and scalable ECC architecture is also proposed. Our dual-field ECC architecture supports arbitrary elliptic curves and arbitrary finite fields with different field sizes. The optimization to a variety of applications with different area/throughput requirements can be achieved rapidly and efficiently. Using 0.13-mum CMOS technology, a 160-bit ECC processor core is implemented, which can perform elliptic-curve scalar multiplication in 340 mus over GF(p) and 155 mus over GF(2m), respectively. The comparison of speed and area overhead among different ECC designs justifies the cost-effectiveness of the proposed ECC architecture with its design methodology.
Keywords :
CMOS logic circuits; Galois fields; VLSI; cryptography; field programmable gate arrays; logic design; processor scheduling; CMOS technology; ECC processor core; Elixir; VLSI; design methodology; elliptic curve cryptography; elliptic-curve scalar multiplication; field-programmable gate array coprocessor; high-throughput cost-effective dual-field processor; size 0.13 mum; two-phase scheduling methodology; Coprocessors; VLSI; elliptic curve cryptography; public-key cryptography;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2008.2001239