Schottky I/sup 2/L

Author

Hewlett, Frank W., Jr.

Volume

10

Issue

5

fYear

1975

Firstpage

343

Lastpage

348

Abstract

Schottky I/SUP 2/L uses the principles of integrated injection logic (I/SUP 2/L/MTL) and the properties of ion implantation to obtain improved performance at the same densities as conventional I/SUP 2/L. Schottky diodes are formed in the multicollectors of the switching transistor and reduce the signal swing, thus improving the power delay efficiency. An increase in the intrinsic speed limit is also feasible. The Schottky I/SUP 2/L structure and characteristics are described and contrasted with conventional I/SUP 2/L. A model which is useful for its design is discussed. Integrated test structures which provide direct comparison between conventional and Schottky I/SUP 2/L performance have been fabricated. The experimental results demonstrate a factor of 2 improvement in power-delay efficiency of Schottky I/SUP 2/L over conventional I/SUP 2/L.

Keywords

Digital integrated circuits; Logic circuits; Monolithic integrated circuits; Schottky-barrier diodes; digital integrated circuits; logic circuits; monolithic integrated circuits; Capacitance; Cathodes; Epitaxial layers; Fabrication; Ion implantation; Metallization; Schottky barriers; Schottky diodes; Substrates; Surfaces;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.1975.1050621

Filename

1050621