Title :
A 64-kbit block addressed charge-coupled memory
Author :
Mohsen, Amr M. ; Bower, Robert W. ; Wilder, E. Marshall ; Erb, Darrell M.
Abstract :
Describes the design and performance of a 64-kbit (65536 bits) block addressed charge-coupled serial memory. By using the offset-mask charge-coupled device (CCD) electrode structure to obtain a small cell size, and an adaptive system approach to utilize nonzero defect memory chips, the system cost per bit of charge-coupled serial memory can be reduced to provide a solid-state replacement of moving magnetic memories and to bridge the gap between high cost random access memories (RAM´s) and slow access magnetic memories.
Keywords :
Charge-coupled devices; Digital integrated circuits; Monolithic integrated circuits; Semiconductor storage devices; charge-coupled devices; digital integrated circuits; monolithic integrated circuits; semiconductor storage devices; Charge coupled devices; Costs; Decoding; Electrodes; Magnetic devices; Magnetic memory; Power dissipation; Random access memory; Read-write memory; Solid state circuits;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1976.1050674
