Title :
Charge Collection in CMOS/SOS Structures
Author :
Campbell, A.B. ; Knudson, A.R. ; Stapor, W.J. ; Shapiro, P. ; Diehl-Nagle, S.E. ; Hauser, J.
Author_Institution :
Naval Research Laboratory Washington, D.C. 20375-5000
Abstract :
Charge collection measurements in CMOS/SOS test structures have shown that even for highly ionizing ion tracks the fraction of the charge collected at a node is about equal to what is expected from the amount deposited in the silicon layer and that no charge is collected from the sapphire substrate.
Keywords :
CMOS integrated circuits; CMOS technology; Charge measurement; Current measurement; FETs; Insulation life; Silicon; Single event upset; Substrates; Testing;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.1985.4334080
