• DocumentCode
    881826
  • Title

    Majority Gate Networks

  • Author

    Amarel, S. ; Cooke, G. ; Winder, R.O.

  • Author_Institution
    RCA Laboratories, Princeton, N. J.
  • Issue
    1
  • fYear
    1964
  • Firstpage
    4
  • Lastpage
    13
  • Abstract
    This paper presents methods for realizing simple threshold functions of n arguments by networks of k-input majority gates, where k≪n. An optimal network realization of the 5-argument majority function using 3-input majority gates is given, and it is then generalized by steps with realizations for the (2n-l)-argument majority function (where n = 3, 4, ...) using (2n-3)-input majority gates, and then for the (2n-1)-argument majority function using (2k-l)-input majority gates (where k≪n). In a final generalization an array network using (2k-l)-input majority gates introduced for the realization of an (m/n), ``simple,´´ threshold function (where m = 1, 2, ...,n). The array network is then applied to the synthesis of arbitrary symmetric functions; in the latter synthesis a realization of ``adjustable logic´´ is given where, by simple control of network connections, the same network can be made to compute any symmetric function. The specific networks for ``5 by 3´s´´ (5-argument majority function realized by a 3-input majority gate), ``7 by 5´s´´, and ``7 by 3´s´´ are the best known.
  • Keywords
    Computer networks; Logic arrays; Network synthesis; Upper bound;
  • fLanguage
    English
  • Journal_Title
    Electronic Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0367-7508
  • Type

    jour

  • DOI
    10.1109/PGEC.1964.263829
  • Filename
    4038070