DocumentCode
881938
Title
Memory characteristics of MOSFETs with densely stacked silicon nanocrystal Layers in the gate oxide synthesized by low-energy ion beam
Author
Ng, C.Y. ; Chen, T.P. ; Ding, L. ; Fung, S.
Author_Institution
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Volume
27
Issue
4
fYear
2006
fDate
4/1/2006 12:00:00 AM
Firstpage
231
Lastpage
233
Abstract
Densely stacked silicon nanocrystal layers embedded in the gate oxide of MOSFETs are synthesized with Si ion implantation into an SiO2 layer at an implantation energy of 2 keV. In this letter, the memory characteristics of MOSFETs with 7-nm tunnel oxide and 20-nm control oxide at various temperatures have been investigated. A threshold voltage window of ∼ 0.5 V is achieved under write/erase (W/E) voltages of +12 V/-12 V for 1 ms. The devices exhibit good endurance up to 105 W/E cycles even at a high operation temperature of 150°C. They also have good retention characteristics with an extrapolated ten-year memory window of ∼ 0.3 V at 100°C.
Keywords
MOSFET; elemental semiconductors; ion implantation; nanostructured materials; semiconductor storage; silicon; silicon compounds; -12 V; 0.5 V; 1 ms; 100 C; 12 V; 150 C; 2 keV; 20 nm; 7 nm; MOSFET devices; Si; SiO2; gate oxide synthesis; ion implantation; low-energy ion beam; memory characteristics; memory effect; silicon nanocrystal layers; threshold voltage; tunnel oxide; write-erase voltage; Chemical vapor deposition; Dielectric films; Ion beams; Ion implantation; MOSFETs; Nanocrystals; Nonvolatile memory; Silicon; Temperature control; Threshold voltage; Low energy ion beam; memory effect; silicon nanocrystal (nc-Si);
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2006.871183
Filename
1610770
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