Title :
A VLSI chip set for a large-scale parallel inference machine: PIM/m
Author :
Machida, Hirohisa ; Ando, Hideki ; Yasuda, Kenichi ; Furutani, Kiyohiro ; Yamashita, Yukihiro ; Nakashima, Hiroshi ; Takeda, Yasutaka ; Nakajima, Katsuto ; Sakao, Masayoshi ; Nakaya, Masao
Author_Institution :
Mitsubishi Electric Corp., Itami, Japan
fDate :
3/1/1993 12:00:00 AM
Abstract :
The authors present three VLSI chips-a processor (PU) chip, a cache memory (CU) chip, and a network control (NU) chip-for a large-scale parallel inference machine. The PU chip has been designed to be adapted to logic programming languages such as PROLOG. The CU chip implements a hardware support called `trial buffer´ which is suitable for the execution of the PROLOG-like languages. The NU chip makes it possible to connect 256 processing elements in a mesh network. The parallel inference machine (PIM/m) runs a PROLOG-like network-based operating system called PIMOS as well as many applications and has a peak performance of 128 mega logical inferences per second (MLIPS). The PU chip containing 384000 transistors is fabricated in a 0.8 μm double-metal CMOS technology. The CU chip and the NU chip contain 610000 and 329000 transistors, respectively. They are fabricated in a 1.0 μm double-metal CMOS technology. A cell-based design method is used to reduce the layout design time
Keywords :
CMOS integrated circuits; VLSI; buffer storage; digital integrated circuits; integrated memory circuits; knowledge based systems; microprocessor chips; network interfaces; parallel machines; special purpose computers; 0.8 micron; 1 micron; PIMOS; PROLOG; VLSI chip set; cache memory chip; cell-based design method; double-metal CMOS technology; large-scale; logic programming languages; mesh network; network control chip; network-based operating system; parallel inference machine; processor chip; Artificial intelligence; CMOS technology; Cache memory; Concurrent computing; Information processing; Laboratories; Large-scale systems; Logic programming; Mesh networks; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
