• DocumentCode
    882019
  • Title

    Use of inverse Karnaugh maps in realisation of logic functions

  • Author

    Evans, F.C.

  • Volume
    5
  • Issue
    21
  • fYear
    1969
  • Firstpage
    537
  • Lastpage
    538
  • Abstract
    The dual form of the commonly used Karnaugh map has certain advantages when it is required to minimise a logical function, particularly if the function is to be realised by means of NAND gates making use of the `wired-OR¿ connection.
  • Keywords
    Boolean functions; logic design;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19690403
  • Filename
    4210622
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=882019