DocumentCode
882149
Title
A low-power 12-b analog-to-digital converter with on-chip precision trimming
Author
De Wit, Michiel ; Tan, Khen-Sang ; Hester, Richard K.
Author_Institution
Texas Instruments Inc., Dallas, TX, USA
Volume
28
Issue
4
fYear
1993
fDate
4/1/1993 12:00:00 AM
Firstpage
455
Lastpage
461
Abstract
The design and performance of a 12-b charge redistribution analog-to-digital converter (ADC) is described. The architecture is chosen to minimize power dissipation. Die area is minimized by a modified self-calibration algorithm and nonvolatile memory based on polysilicon fuses. The ADC is fabricated in a 1-μm CMOS process. It converts at a 200-kHz rate with a power dissipation of 10 mW
Keywords
CMOS integrated circuits; analogue-digital conversion; calibration; 1 micron; 10 mW; 12 bit type; 200 kHz; ADC; CMOS process; charge redistribution; low-power; modified self-calibration algorithm; monolithic type; nonvolatile memory; on-chip precision trimming; polysilicon fuses; power dissipation; Aging; Analog-digital conversion; Capacitors; Circuits; Fuses; Logic devices; Logic testing; Nonvolatile memory; Packaging; Power dissipation;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.210028
Filename
210028
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