DocumentCode
882271
Title
Ion-implanted super-grain transistors
Author
Gegg, Winifred M. ; Saltich, Jack L. ; Roop, Raymond M. ; George, William L.
Volume
11
Issue
4
fYear
1976
fDate
8/1/1976 12:00:00 AM
Firstpage
485
Lastpage
491
Abstract
This paper discusses the use of ion implantation to develop a viable high-yielding process for fabricating super-gain transistors for integrated circuits. The authors discuss the fabrication processes utilized, the pertinent device physics, the manufacturing tradeoffs, and present the results obtained for two different ion-implanted base integrated-circuit processes.
Keywords
Bipolar transistors; Ion implantation; Semiconductor device manufacture; Semiconductor doping; bipolar transistors; ion implantation; semiconductor device manufacture; semiconductor doping; Analog integrated circuits; Bipolar transistors; Gallium arsenide; Integrated circuit technology; Laboratories; P-i-n diodes; Physics; Semiconductor diodes; Solid modeling; Solid state circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1976.1050763
Filename
1050763
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