Title :
Multilevel random-access memory using one transistor per cell
Author :
Heald, Raymond A. ; Hodges, David A.
Abstract :
A memory cell capable of storing multilevel or analog information and providing random-access operation with nondestructive readout has been studied. It uses a single junction field-effect transistor (JFET) as the storage cell. Experimental and analytical studies suggest that eight of sixteen level operation should be feasible with refresh operations every 0.1 to 1 s; cell area can be under 2 mil/SUP 2/. Tracking voltage and current reference circuitry is used to accommodate variations in fabrication processing and operating temperature.
Keywords :
Digital integrated circuits; Field effect transistors; Monolithic integrated circuits; Random-access storage; Semiconductor storage devices; digital integrated circuits; field effect transistors; monolithic integrated circuits; random-access storage; semiconductor storage devices; Circuits; FETs; Fabrication; Leakage current; MOSFETs; Optical arrays; Random access memory; Temperature; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1976.1050769
