Synthesis of Practical Three-Input Majority Logic Networks

This paper deals with a method of realizing switching functions with three-input majority gates, utilizing a modification of the theory of Akers [1]. This approach attempts to minimize the total number of elements used for both gating and delay. The method derived is suitable for implementation on a digital computer and a program was written for the Burroughs 220 computer which produces excellent results for switching functions of 6 variables or less. Results of sample programs are given and limitations of the method are discussed.