• DocumentCode
    882723
  • Title

    Field strength degradation in Si-SiO/SUB 2/-polycrystalline Si structures

  • Author

    Mattauch, R.J. ; Howle, W.M., Jr.

  • Volume
    11
  • Issue
    5
  • fYear
    1976
  • fDate
    10/1/1976 12:00:00 AM
  • Firstpage
    732
  • Lastpage
    735
  • Abstract
    The single crystal silicon-silicon dioxide-polycrystalline silicon system has been studied both experimentally and theoretically with respect to dielectric breakdown. Degraded dielectric field strength was measured for structures which had polycrystalline silicon deposited at temperatures in excess of 800°C. The extent of degradation was found to increase with temperatures above 800°C. A mathematical model was developed which allowed calculation of interface stress magnitudes for the structure. Comparison of calculated values of stress in the polycrystalline silicon with known values of yield stress for single crystal silicon at high temperatures indicates that valid dielectric field strength degradation for deposition temperatures in excess of 800°C is most likely due to thermally induced surface irregularities due to plastic deformation of the polycrystalline silicon.
  • Keywords
    Electric breakdown of solids; Semiconductor-insulator boundaries; electric breakdown of solids; semiconductor-insulator boundaries; Circuit simulation; Circuit theory; Computational modeling; Degradation; Dielectric breakdown; Dielectric measurements; Electrodes; Silicon; Solid state circuits; Temperature;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1976.1050806
  • Filename
    1050806