A capacitorless 1T-DRAM technology using gate-induced drain-leakage (GIDL) current for low-power and high-speed embedded memory

Author

Yoshida, Eiji ; Tanaka, Tetsu

Author_Institution

Fujitsu Labs. Ltd., Akiruno, Japan

Volume

53

Issue

4

fYear

2006

fDate

4/1/2006 12:00:00 AM

Firstpage

692

Lastpage

697

Abstract

A capacitorless one-transistor (1T)-dynamic random-access memory (DRAM) cell using gate-induced drain-leakage (GIDL) current for write operation was demonstrated. Compared with the conventional write operation with impact-ionization (II) current, the write operation with GIDL current achieves power consumption that is lower by four orders of magnitude and a write speed within several nanoseconds. The capacitorless 1T DRAM is the most promising technology for high-performance embedded-DRAM large-scale integration.

Keywords

DRAM chips; large scale integration; leakage currents; low-power electronics; system-on-chip; capacitorless IT-DRAM technology; gate induced drain leakage current; high speed embedded memory; impact ionization current; large scale integration; low power embedded memory; Capacitance; Capacitors; Energy consumption; Helium; Large scale integration; Logic devices; MOSFET circuits; Random access memory; Silicon on insulator technology; Threshold voltage; Dynamic random-access memory (DRAM); embedded memory; floating-body effect; gate-induced drain leakage (GIDL); silicon-on-insulator (SOI);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2006.870283

Filename

1610897