Fix to negative output conductance problem in BSIM2 model [MOSFET]

Author

Lin, Wallace W. ; Chan, Philip C.

Author_Institution

Intel Corp., Santa Clara, CA, USA

Volume

40

Issue

5

fYear

1993

fDate

5/1/1993 12:00:00 AM

Firstpage

1024

Lastpage

1028

Abstract

The long-standing negative output conductance problem observed in the BSIM2 model, which causes convergence problems in circuit simulation, has been studied and resolved. The problem is identified to be related to both parameter extraction methodology and model equations. A redundant boundary condition in the saturation region for the optimization of output characteristics was found. A problematic channel length modulation equation also contributes to the problem. The fix to this problem not only eliminates the negative conductances in the simulated output characteristics of long-channel transistors but also preserves fits to output characteristics of short-channel transistors. The fix, at the same time, speeds up the parameter extraction process by 20% by eliminating five of the model parameters

Keywords

insulated gate field effect transistors; negative resistance; semiconductor device models; BSIM2 model; I-V characteristics; MOSFET model; channel length modulation equation; circuit simulation; convergence problems; long-channel transistors; negative output conductance problem; output characteristics optimization; parameter extraction methodology; redundant boundary condition; saturation region; short-channel transistors; Circuit analysis computing; Circuit simulation; Electron devices; FETs; Gallium arsenide; Insulation; MOSFET circuits; Solids; Tunneling; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.210216

Filename

210216