Title :
Charging efficiency of depletion load devices
fDate :
6/1/1977 12:00:00 AM
Abstract :
Considers an optimization of depletion MOSFET devices used as loads in large-scale integrated circuits. A `normalized power´ parameter is developed for use in the optimization process. The effects of depletion threshold voltage, body effect constant, and substrate bias are examined.
Keywords :
Field effect integrated circuits; Field effect transistors; Large scale integration; field effect integrated circuits; field effect transistors; large scale integration; Analog integrated circuits; Capacitance; Diodes; Immune system; MOS devices; Mirrors; Notice of Violation; Oscilloscopes; Resistors; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1977.1050900
