• DocumentCode
    883758
  • Title

    Charging efficiency of depletion load devices

  • Author

    Armstrong, W.E.

  • Volume
    12
  • Issue
    3
  • fYear
    1977
  • fDate
    6/1/1977 12:00:00 AM
  • Firstpage
    313
  • Lastpage
    316
  • Abstract
    Considers an optimization of depletion MOSFET devices used as loads in large-scale integrated circuits. A `normalized power´ parameter is developed for use in the optimization process. The effects of depletion threshold voltage, body effect constant, and substrate bias are examined.
  • Keywords
    Field effect integrated circuits; Field effect transistors; Large scale integration; field effect integrated circuits; field effect transistors; large scale integration; Analog integrated circuits; Capacitance; Diodes; Immune system; MOS devices; Mirrors; Notice of Violation; Oscilloscopes; Resistors; Voltage;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1977.1050900
  • Filename
    1050900
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=883758