DocumentCode
884094
Title
Decompositions of Logical Functions Using Majority Decision Elements
Author
Tohma, Y.
Author_Institution
Electronic Engineering Dept., Tokyo Institute of Technology, Tokyo, Japan.
Issue
6
fYear
1964
Firstpage
698
Lastpage
705
Abstract
A method of decomposing logical functions using three input majority gates is given. This method requires that at least one of the inputs to the gate be specified, and from this the other inputs may be found. For unate functions one of the variables may be completely separated at each level. A method using a Karnaugh map is proposed for finding the best function to use as the specified input, which will make the other inputs to the majority gate easier to synthesize.
Keywords
Adaptive systems; Computer aided manufacturing; Contracts; Diodes; Instruments; Logic arrays; Mathematics; Network synthesis; Sequential circuits;
fLanguage
English
Journal_Title
Electronic Computers, IEEE Transactions on
Publisher
ieee
ISSN
0367-7508
Type
jour
DOI
10.1109/PGEC.1964.263903
Filename
4038301
Link To Document