DocumentCode :
884439
Title :
Link augmented binary (LAB)-tree architecture
Author :
Mittal, R. ; Jain, B.N. ; Patney, R.K.
Author_Institution :
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Madras, India
Volume :
140
Issue :
2
fYear :
1993
fDate :
3/1/1993 12:00:00 AM
Firstpage :
127
Lastpage :
133
Abstract :
A new augmented binary-tree multiprocessor architecture, called LAB-tree, is proposed. It consists of an n-level full/binary tree augmented with (2n-2) redundant links. The short and regular redundant links improve several properties of the full/binary tree, such as increased tolerance, reduced traffic congestion and efficient routing of messages. It is shown that there exist at least two node-disjoint paths between every pair of nodes in the LAB-tree. In fact, all nonfaulty nodes remain connected in the presence of one faulty node at each level of the tree. The LAB-tree supports simple shortest-path routing algorithms which distribute messages evenly over links. The LAB-tree can be constructed modularly in VLSI by interconnecting modules or smaller size.
Keywords :
multiprocessor interconnection networks; parallel architectures; LAB-tree; binary-tree multiprocessor architecture; node-disjoint paths; shortest-path routing;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
Publisher :
iet
ISSN :
0143-7062
Type :
jour
Filename :
210335
Link To Document :
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