A dual-differential analog shift register with a charge-splitting input and on-chip peripheral circuits

A very high degree of stability and the elimination of external support circuitry are requirements for many signal-processing applications of analog charge-coupled devices. A device that meets these requirements has been designed and fabricated. The device requires a single clock input signal and achieves a gain-temperature stability of /spl plusmn/0.015 dB over 0-50/spl deg/C and a gain-voltage stability of /spl plusmn/0.05 dB over a power-supply variation of /spl plusmn/10 percent. The NMOS device demonstrates the compatibility of digital, linear, and charge-coupled devices on a single chip.