DocumentCode :
885162
Title :
A Synthesis Technique for Networks Consisting of Logical Functions Feeding a Linear Summation Element
Author :
Gose, Earl E.
Author_Institution :
Engineering Div., Case Institute of Technology, Cleveland, Ohio.
Issue :
2
fYear :
1965
fDate :
4/1/1965 12:00:00 AM
Firstpage :
254
Lastpage :
256
Abstract :
Compiler programs are used to convert engineering test specifications to a digital code which can be interpreted by the automatic test equipment system. A programming language based upon decision-table techniques allows the test engineer to write his test statements in an extremely convenient fashion and permits him to program any test specification with only a minimum of knowledge about the specific test equipment system and particular programming techniques.
Keywords :
Chebyshev approximation; Circuit testing; Electronic equipment testing; Logic circuits; Logic design; Logic devices; Logic testing; Network synthesis; Switching circuits; Tellurium;
fLanguage :
English
Journal_Title :
Electronic Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0367-7508
Type :
jour
DOI :
10.1109/PGEC.1965.264256
Filename :
4038412
Link To Document :
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