DocumentCode :
885418
Title :
Nanometre technology´s impact on design signoff
Author :
Brunei, J.-M. ; Graupp, Bill
Volume :
5
Issue :
2
fYear :
2007
Firstpage :
32
Lastpage :
35
Abstract :
The move to smaller geometries continues its relentless march. Although it allows for higher transistor counts, nanometre scaling has the potential to severely inhibit the path to achieve sustainable yield. To address the challenges of moving to smaller and smaller nanometre technologies there must be an overhaul in how designs are created and manufactured. As more design starts shift to 130nm and below, the use of resolution enhancement technology (RET) is becoming quite prevalent and well understood. Next-generation RET technology will make the 45nm designs printable but comes at the cost of more complex models and correction techniques that can deal with variations across the process window
Keywords :
computational complexity; design for manufacture; integrated circuit layout; nanotechnology; 130 nm; 45 nm; computational complexity; design for manufacture; integrated circuit design; integrated circuit layout; nanometer scaling; resolution enhancement technology;
fLanguage :
English
Journal_Title :
Electronics Systems and Software
Publisher :
iet
ISSN :
1479-8336
Type :
jour
Filename :
4212129
Link To Document :
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