DocumentCode :
885546
Title :
Negative dynamic resistance in MOS devices
Author :
Sharma, Dinesh ; Gautier, Jacques ; Merckel, Gerard
Volume :
13
Issue :
3
fYear :
1978
fDate :
6/1/1978 12:00:00 AM
Firstpage :
378
Lastpage :
380
Abstract :
An electro thermal model is presented to explain negative dynamic resistance phenomena observed in the saturation region of MOS transistors operating at moderate and elevated power levels (P/SUB d/≥300 mW).
Keywords :
Insulated gate field effect transistors; Negative resistance; Semiconductor device models; insulated gate field effect transistors; negative resistance; semiconductor device models; Breakdown voltage; Circuit testing; Driver circuits; Inverters; MOS devices; MOSFETs; Solid state circuits; Switches; Switching circuits; Temperature;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1978.1051060
Filename :
1051060
Link To Document :
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