Planar GaAs IC technology: Applications for digital LSI

Author

Eden, Richard C. ; Welch, Bryant M. ; Zucca, Ricardo

Volume

13

Issue

4

fYear

1978

fDate

8/1/1978 12:00:00 AM

Firstpage

419

Lastpage

426

Abstract

This technology utilizes multiple localized ion implantations directly into semi-insulating GaAs substrates, with unimplanted areas providing isolation between circuit elements. This approach allows for high yield, high density circuits, with optimization of various types of devices (e.g., GaAs MESFETs, high-speed Schottky-barrier diodes, etc.) made possible by optimizing the implantation profile for each type of device. The application of this fabrication technology for high-speed, ultra low power digital integrated circuits using a new circuit approach called Schottky diode-FET logic (SDFL) is described. Experimental GaAS SDFL logic ICs with LSI/VLSI compatible power levels (200-500 μW/gate) and circuit densities (<10/SUP -3/ mm/SUP 2//gate) have been fabricated.

Keywords

Field effect integrated circuits; Gallium arsenide; Integrated circuit technology; Integrated logic circuits; Ion implantation; Large scale integration; Schottky gate field effect transistors; field effect integrated circuits; gallium arsenide; integrated circuit technology; integrated logic circuits; ion implantation; large scale integration; Application specific integrated circuits; Digital integrated circuits; Gallium arsenide; Integrated circuit yield; Ion implantation; Isolation technology; Large scale integration; Logic circuits; Logic devices; Schottky diodes;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.1978.1051071

Filename

1051071