DocumentCode :
885839
Title :
Spacer-First Damascene-Gate FinFET Architecture Featuring Stringer-Free Integration
Author :
Cornu-Fruleux, F. ; Penaud, J. ; Dubois, E. ; Coronel, P. ; Larrieu, G. ; Skotnicki, T.
Author_Institution :
Inst. d´´Electron., Villeneuve d´´Ascq
Volume :
28
Issue :
6
fYear :
2007
fDate :
6/1/2007 12:00:00 AM
Firstpage :
523
Lastpage :
526
Abstract :
This letter presents a new Damascene-gate FinFET process that inherently suppresses stringers, resulting from gate and spacers patterning. The so-called spacer-first integration scheme relies on the engineering of a hydrogen silsesquioxane layer by electron beam lithography followed by two selective compartmentalized development steps to successively release the Damascene-gate cavity and the source/drain (S/D) contact regions. In contrast to the existing gate-first and gate-last integration approaches, the resulting FinFET process does not impose any restriction or interdependency on the sizing of the fins, gate, spacers, and S/D regions. A complete morphological and electrical validation is proposed in the particular case of wrap-around self-aligned metallic Schottky S/D contacts.
Keywords :
MOSFET; Schottky barriers; electron beam lithography; electrical validation; electron beam lithography; hydrogen silsesquioxane layer; morphological validation; spacer-first damascene-gate FinFET architecture; stringer-free integration; wrap-around self-aligned metallic Schottky S-D contacts; Contacts; Dielectric substrates; Electron beams; Electrostatics; Etching; FinFETs; Hydrogen; Lithography; Schottky barriers; Surface resistance; FinFET; Schottky barrier; hydrogen silsesquioxane (HSQ); multiple gate;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2007.897443
Filename :
4212170
Link To Document :
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