DocumentCode
885855
Title
JFET´s fabricated in a standard IC process for bipolar transistors
Author
Meijer, Gerard C M ; Verweijen, Frans L J
Volume
13
Issue
4
fYear
1978
fDate
8/1/1978 12:00:00 AM
Firstpage
530
Lastpage
532
Abstract
A new method for the fabrication of n- and p-channel JFETs in a standard IC process for bipolar transistors is presented. Using special layout techniques, which are based on well-known principles, JFETs of good performance are obtained, provided a tightly controlled photoresist process is available.
Keywords
Integrated circuit technology; Junction gate field effect transistors; integrated circuit technology; junction gate field effect transistors; Bipolar integrated circuits; Bipolar transistors; Capacitance; Current supplies; Frequency conversion; Isolation technology; Master-slave; Merging; Stacking; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1978.1051091
Filename
1051091
Link To Document