New Insights on “Capacitorless” Floating-Body DRAM Cells

Author

Fossum, Jerry G. ; Lu, Zhichao ; Trivedi, Vishal P.

Author_Institution

Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL

Volume

28

Issue

6

fYear

2007

fDate

6/1/2007 12:00:00 AM

Firstpage

513

Lastpage

516

Abstract

The notion of a "potential well" for charge storage in the floating body of the "capacitorless" DRAM cell is shown to be inadequate and misleading. The basic operation of the floating-body MOSFET cell (FBC) is physically overviewed, with supportive numerical device simulations and analytical modeling. New insights are revealed, including identification of the intrinsic dynamic capacitors that actually store the body charge. Multiple roles of an accumulation layer that is needed in fully depleted FBCs are physically defined for the first time. Optimal FBC designs are implied

Keywords

DRAM chips; MOSFET; integrated circuit modelling; silicon-on-insulator; SOI MOSFET; accumulation layer; analytical modeling; body capacitance; body charge; capacitorless floating-body DRAM cells; charge storage; double-gate MOSFET; floating-body MOSFET cell; independent-gate FinFET; intrinsic dynamic capacitors; numerical device simulations; p-n junction; silicon-on-insulator; Analytical models; Capacitance; Capacitors; FinFETs; MOSFET circuits; Numerical simulation; P-n junctions; Partial discharges; Random access memory; Silicon on insulator technology; Body capacitance; double-gate (DG) MOSFETs; floating-body effects; independent-gate (IG) FinFET; p-n junction; silicon-on-insulator (SOI) MOSFETs;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2007.896883

Filename

4212173