DocumentCode :
885873
Title :
A method of processor selection for interrupt handling in a multiprocessor system
Author :
Gountanis, R.J. ; Viss, N.L.
Author_Institution :
Univac Division of Sperry Rand Corporation, St. Paul, Minn.
Volume :
54
Issue :
12
fYear :
1966
Firstpage :
1812
Lastpage :
1819
Abstract :
A method of assigning external interrupts to processors in a multiprocessor system is described. Features of a multilevel priority interrupt system are incorporated into a hardware component called the Interrupt Directory. The directory selects the most appropriate processor for servicing the interruption at the time the event occurs. The "appropriateness" for interruption is based on the priority level of a processor\´s current task, thus providing dynamic priority allocation of tasks. Queueing of interrupts is also provided. The arrangement described in this paper simplifies and increases the effectiveness of executive control programs. Implications of the Interrupt Directory on reliability and "fail-soft" operation are also discussed.
Keywords :
Central Processing Unit; Control systems; Hardware; Master-slave; Multiprocessing systems; Operating systems; Registers; Routing;
fLanguage :
English
Journal_Title :
Proceedings of the IEEE
Publisher :
ieee
ISSN :
0018-9219
Type :
jour
DOI :
10.1109/PROC.1966.5265
Filename :
1447195
Link To Document :
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