High speed and high density static induction transistor memory

Author

Nishizawa, Jun-ichi ; Tamamushi, Takashige ; Mochida, Yasunori ; Nonaka, Terumoto

Volume

13

Issue

5

fYear

1978

fDate

10/1/1978 12:00:00 AM

Firstpage

622

Lastpage

634

Abstract

Describes a high speed and high density dynamic RAM utilizing a static induction transistor (SIT) structure. The main conduction mechanism of an SIT is carrier injection control due to the potential hump at the intrinsic gate, where the potential hump is capacitively controlled by the gate and the drain voltage in a basic operation. The SIT forms a dynamic RAM memory cell if one of the drain and the source regions is set as a floating region directly connected to the storage capacitor. Basic operation of a single SIT memory cell is experimentally demonstrated in this paper.

Keywords

Field effect integrated circuits; Integrated circuit technology; Integrated memory circuits; Junction gate field effect transistors; Large scale integration; Random-access storage; field effect integrated circuits; integrated circuit technology; integrated memory circuits; junction gate field effect transistors; large scale integration; random-access storage; Bipolar transistors; DRAM chips; Electrons; FETs; Physics; Pulse modulation; Random access memory; Semiconductor devices; Silicon; Voltage control;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.1978.1051110

Filename

1051110