A high-speed low-power 4096 x 1 bit bipolar RAM

Describes a 4096-word by 1-bit TTL static bipolar RAM with a typical address access time of 25 ns and power dissipation of 350 mW. Emphasis is given to circuit techniques which made the high performance possible. These techniques are: variable impedance cell (VIC) with low standby current capable of fast switching of digit lines, cell margin increasing circuitry which increases the operating margin of the cell with low standby current, sharing of only one pair of read current sources by 64 pairs of digit lines, and Darlington word drivers causing fast switching of word lines. The process and device structure are mentioned briefly.