DocumentCode :
886049
Title :
A high-speed low-power 4096 x 1 bit bipolar RAM
Author :
Hotta, Atsuo ; Kato, Yukio ; Yamaguchi, Kunihiko ; Honma, Noriyuki ; Inadachi, Masaaki
Volume :
13
Issue :
5
fYear :
1978
Firstpage :
651
Lastpage :
656
Abstract :
Describes a 4096-word by 1-bit TTL static bipolar RAM with a typical address access time of 25 ns and power dissipation of 350 mW. Emphasis is given to circuit techniques which made the high performance possible. These techniques are: variable impedance cell (VIC) with low standby current capable of fast switching of digit lines, cell margin increasing circuitry which increases the operating margin of the cell with low standby current, sharing of only one pair of read current sources by 64 pairs of digit lines, and Darlington word drivers causing fast switching of word lines. The process and device structure are mentioned briefly.
Keywords :
Bipolar integrated circuits; Integrated circuit technology; Integrated memory circuits; Large scale integration; Random-access storage; Transistor-transistor logic; bipolar integrated circuits; integrated circuit technology; integrated memory circuits; large scale integration; random-access storage; transistor-transistor logic; Clamps; Diodes; Driver circuits; Impedance; MOS devices; Optical wavelength conversion; Power dissipation; Read-write memory; Resistors; Switching circuits;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1978.1051114
Filename :
1051114
Link To Document :
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