Title :
A new multilevel storage structure for high density CCD memory
Author :
Yamada, Michihiro ; Fujishima, Kazuyasu ; Nagasawa, Koichi ; Gamou, Yoshimi
Abstract :
A multilevel storage (MLS) structure for high density CCD memory is proposed and demonstrated. Using four levels of charge, 2 bits can be stored in one storage cell. Stored charge is transferred by a clocking scheme which provides larger charge-carrying capacity without increasing memory cell size. These techniques make it possible to achieve high packing density without requiring fine patterning.
Keywords :
Charge-coupled device circuits; Integrated circuit technology; Integrated memory circuits; Large scale integration; charge-coupled device circuits; integrated circuit technology; integrated memory circuits; large scale integration; Bridge circuits; Charge coupled devices; Clocks; Costs; Electrodes; Magnetic memory; Multilevel systems; Power system economics; Random access memory; Read-write memory;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1978.1051120
