A family of user-programmable peripherals with a functional unit architecture

Author

Shubat, Alexander S. ; Trinh, Cuong Q. ; Zaliznyak, Arkady ; Ziklik, Arye ; Roy, Anirban ; Kazerounian, Reza ; Cedar, Y. ; Eitan, Boaz

Author_Institution

WaferScale Integration Inc., Fremont, CA, USA

Volume

27

Issue

4

fYear

1992

fDate

4/1/1992 12:00:00 AM

Firstpage

515

Lastpage

529

Abstract

A family of user-programmable peripherals, utilizing an integration strategy based on a programmable system device (PSD) concept, is described. Specifically, PSD is an efficient and highly configurable integration of high-density memory and LSI level logic blocks. The configurability is derived by providing programmable logic and programmable interconnect. PSDX is the first PSD family of programmable microcontroller peripherals; it integrates 256 kb to 1 Mb of EPROM, 16 kb of SRAM, a 28-input by 42-product term programmable logic device (PLD), and flexible I/O ports. This family is primarily targeted for embedded microcontroller applications. Using one PSD device it is possible to replace all the core peripherals in the system and, as a result, achieve a reduction in components, power dissipation, and overall system cost. The flexible architecture is achieved by providing 46 configuration options, which allows the PSD to interface with virtually any 8- or 16-b microcontroller. The integration is made possible by developing a special configurability and testability scheme. These parts are realized on a 1.2-μm CMOS EPROM process

Keywords

CMOS integrated circuits; EPROM; SRAM chips; integrated memory circuits; logic arrays; 1.2 micron; 16 bit; 16 kbit; 256 to 1024 kbit; 8 bit; CMOS; EPROM; I/O ports; LSI level logic blocks; PLD; PSD device; PSD family; PSDX; SRAM; configurability; configurability and testability scheme; configurable integration; configuration options; embedded microcontroller applications; functional unit architecture; high-density memory; integration strategy; overall system cost; peripherals family; power dissipation; programmable interconnect; programmable logic; programmable logic device; programmable microcontroller peripherals; programmable system device; reduction in components; user-programmable peripherals; Costs; EPROM; Large scale integration; Logic devices; Microcontrollers; Power dissipation; Programmable logic arrays; Programmable logic devices; Random access memory; Testing;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.126539

Filename

126539