DocumentCode
886425
Title
A monolithic phase-locked loop with post detection processor
Author
Murthi, Enjeti N.
Volume
14
Issue
1
fYear
1979
Firstpage
155
Lastpage
161
Abstract
Describes the design and fabrication of a high-frequency (50-MHz) phase-locked loop with a post detection processor which allows the detection of FSK signals with few external components. The circuit operates with a single 5-V supply and has TTL compatible inputs and outputs.
Keywords
Demodulation; Detectors; Frequency shift keying; Phase-locked loops; demodulation; detectors; frequency shift keying; phase-locked loops; Circuits; Demodulation; Filters; Frequency shift keying; Phase detection; Phase locked loops; Schottky diodes; Signal processing; Voltage; Voltage-controlled oscillators;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1979.1051154
Filename
1051154
Link To Document