DocumentCode :
886828
Title :
A 576 K 3.5-ns access BiCMOS ECL static RAM with array built-in self-test
Author :
Bonges, Henry A., III ; Adams, R. Dean ; Allen, Archibald J. ; Flaker, Roy ; Gray, Kenneth S. ; Hedberg, Erik L. ; Holman, W. Timothy ; Lattimore, George M. ; Lavalette, David A. ; Nguyen, Kim Yen T ; Roberts, Alan L.
Author_Institution :
IBM Gen. Technol. Div., Essex Junction, VT, USA
Volume :
27
Issue :
4
fYear :
1992
fDate :
4/1/1992 12:00:00 AM
Firstpage :
649
Lastpage :
656
Abstract :
An experimental 576 K BiCMOS emitter-coupled-logic (ECL)-compatible SRAM that achieves 3.5-ns access and cycle is discussed. The SRAM is fully self-testable using less than 1 K on-chip logic gates to assist characterization, wafer testing, and package testing. The I/O is also transistor-transistor-logic (TTL) programmable with the first-metal mask
Keywords :
BIMOS integrated circuits; SRAM chips; built-in self test; emitter-coupled logic; integrated circuit testing; 3.5 ns; 576 kbit; BIST; BiCMOS; ECL compatible; TTL programmable I/O; array built-in self-test; emitter-coupled-logic; package testing; self-testable; static RAM; transistor-transistor-logic; wafer testing; Automatic testing; BiCMOS integrated circuits; Built-in self-test; Circuit testing; Clocks; Decoding; Logic gates; Logic testing; Random access memory; Signal generators;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.126556
Filename :
126556
Link To Document :
بازگشت