Title :
High-speed CMOS I/O buffer circuits
Author :
Ishibe, Manabu ; Otaka, Shoji ; Takeda, Junichi ; Tanaka, Shigeru ; Toyoshima, Yoshiaki ; Takatsuka, Satoru ; Shimizu, Shoichi
Author_Institution :
Toshiba Corp., Kawasaki, Japan
fDate :
4/1/1992 12:00:00 AM
Abstract :
Very high-speed off-chip data rates have been difficult to achieve in CMOS technologies. An all-CMOS set of I/O buffer circuits, which use current-mode and impedance matching techniques, capable of transmitting off-chip at 1-Gb/s data rates is described. The circuits are also compatible with voltage-mode signal levels for ECL input and MOS output circuits
Keywords :
CMOS integrated circuits; buffer circuits; convertors; 1 Gbit/s; CMOS; ECL input; I/O buffer circuits; MOS output circuits; current-mode; high speed data rates; impedance matching; logic interface; voltage level conversion circuit; voltage-mode signal levels; CMOS logic circuits; CMOS technology; Cooling; Delay; Digital systems; Energy consumption; Impedance matching; Large scale integration; Supercomputers; Threshold voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
