887057

Coding Analog Variables for Threshold Logic Discrimination

Smith, Fred W.

Electronic Defense Laboratories, Sylvania Electronic Systems, Mountain View, Calif.

6

1965

941

943

Clocks; Computational modeling; Costs; Delay lines; Differential equations; Digital simulation; Logic; Modular construction; Network address translation; Timing;

English

Electronic Computers, IEEE Transactions on

ieee

0367-7508

jour

10.1109/PGEC.1965.264117

4038621