DocumentCode :
887558
Title :
A two-stage weighted capacitor network for D/A-A/D conversion
Author :
Yee, Y.S. ; Terman, L.M. ; Heller, L.G.
Volume :
14
Issue :
4
fYear :
1979
Firstpage :
778
Lastpage :
781
Abstract :
A two-stage weighted capacitor network for A/D and D/A conversion utilizing a feedback amplifier is described. The two-stage weighted capacitor DAC requires a smaller range of capacitor values then the conventional weighted capacitor DAC and is not subject to the nonlinear effects of parasitic capacitance. Experimental results of such a DAC implemented using a conventional n-channel metal-gate MOS process are presented. A discussion of the comparative accuracy and area of one- and two-stage weighted capacitor DAC´s on the basis of capacitor tracking is given.
Keywords :
Amplifiers; Analogue-digital conversion; Capacitors; Digital-analogue conversion; amplifiers; analogue-digital conversion; capacitors; digital-analogue conversion; Circuits; Cutoff frequency; Electric breakdown; Electron devices; Feedback amplifiers; Kirk field collapse effect; MOS capacitors; Strontium; Switched capacitor networks; Switches;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.1979.1051264
Filename :
1051264
Link To Document :
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