Title :
An Improved Time Delay Simulation
Author_Institution :
Department of Electrical Engineering, Colorado State University, Fort Collins, Colo.
Keywords :
Analog computers; Circuit synthesis; Computational modeling; Computer simulation; Delay effects; H infinity control; Linearity; Network synthesis; Poles and zeros; Polynomials;
Journal_Title :
Electronic Computers, IEEE Transactions on
DOI :
10.1109/PGEC.1966.264415
