• DocumentCode
    887864
  • Title

    Was it worth the wait? Yes!

  • Author

    Bailey, B.

  • Author_Institution
    Brian Bailey Consulting
  • Volume
    23
  • Issue
    2
  • fYear
    2006
  • Firstpage
    160
  • Lastpage
    161
  • Abstract
    A review of the book, "Verification Methodology Manual for SystemVerilog," by Janick Bergeron et al.
  • Keywords
    SystemVerilog; design reuse; formal verification; testbench; verification; Art; Bibliographies; Books; Feedback; Formal verification; Libraries; Object oriented programming; Open source software; Sections; System testing; SystemVerilog; design reuse; formal verification; testbench; verification;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2006.56
  • Filename
    1613800
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=887864