DocumentCode :
887981
Title :
On the Design of the Arithmetic Unit of a Fixed-Word-Length Computer from the Standpoint of Computational Accuracy
Author :
Gregory, Robert T.
Author_Institution :
Computation Center, University of Texas, Austin, Tex.
Issue :
2
fYear :
1966
fDate :
4/1/1966 12:00:00 AM
Firstpage :
255
Lastpage :
257
Abstract :
It is proposed that possibly the best criterion for judging the arithmetic unit of any modern high-speed computer is its ability to compute d=(a1b1+ a2b2+ ... +anbn)/ c ``accurately´´ in the sense of J. H. Wilkinson. Here d, c, and ai, bi for i = 1, 2, ... , n, are assumed to be single-length numbers. However, the ability to retain each product aibi double-length is desirable for high accuracy. For example, in fixed-point arithmetic d can be computed subject to only one rounding error in computers which possess a double-length accumulator that has the ability to sum the double-length products aibi and to divide the double-length dividend (a1 b1+a2b2+ ... +anbn) by the single-length divisor c, yielding a properly rounded quotient d. (Equally good results can be achieved in floating-point.) Several numerical examples are given which show the remarkable improvement in the accuracy of computed results in machines which pass this test. The need for a long-word-length is stressed, along with the need for both rounded and unrounded fixed-point and floating-point arithmetic.
Keywords :
Circuits; Digital arithmetic; Fixed-point arithmetic; Floating-point arithmetic; Inspection; Instruments; Numerical analysis; Roundoff errors; Testing; Voltage;
fLanguage :
English
Journal_Title :
Electronic Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0367-7508
Type :
jour
DOI :
10.1109/PGEC.1966.264312
Filename :
4038726
Link To Document :
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