DocumentCode
888070
Title
An analog CCD reformatting memory employing two-dimensional charge transfer
Author
Kansy, Robert J.
Volume
14
Issue
6
fYear
1979
Firstpage
1041
Lastpage
1048
Abstract
An analog CCD reformatting memory has been designed and fabricated using an n-channel double level polysilicon gate process. This unique CCD structure employs two-dimensional charge transfer cells in a 32/spl times/32 element array which is accessed by means of integrated CCD demultiplexer and multiplexer structures resulting in greater dynamic range than observed in previous line-addressed designs. The design and operation of this structure are discussed, and examples of applications in analog signal processor architectures are described.
Keywords
Analogue storage; Charge-coupled device circuits; Signal processing; analogue storage; charge-coupled device circuits; signal processing; Charge coupled devices; Charge transfer; Chirp; Correlators; Digital-analog conversion; Discrete Fourier transforms; Doppler radar; Radar applications; Signal processing; Transmitters;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1979.1051313
Filename
1051313
Link To Document