Title :
Scalable and fault tolerant restricted shared memory architecture
Author :
Khan, Gul N. ; Mahmud, Khalid
Author_Institution :
Quaidi Azam Univ., Islamabad, Pakistan
fDate :
4/29/1993 12:00:00 AM
Abstract :
A scalable and fault tolerant restricted shared memory architecture is described which uses dual-port memory blocks for interprocessor communication. For an n processor system, n(n-1)/2 dual-port memory blocks are organised in the form of a triangular matrix. Multiple processors can communicate concurrently as unique and dedicated dual-port memory blocks connect different pairs of processors.
Keywords :
fault tolerant computing; memory architecture; message passing; multiprocessor interconnection networks; shared memory systems; dual-port memory blocks; fault tolerant restricted shared memory architecture; interprocessor communication; message passing; message transfer speed; multiple processor communication; scalable architecture; triangular matrix;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19930524
