DocumentCode
888542
Title
A 2Kx8-bit static MOS RAM with a new memory cell structure
Author
Ohzone, Takashi ; Hirao, Takashi ; Tsuji, Kazuhiko ; Horiuchi, Shiro ; Takayanagi, Shigetoshi
Volume
15
Issue
2
fYear
1980
fDate
4/1/1980 12:00:00 AM
Firstpage
201
Lastpage
205
Abstract
A 2K/spl times/8-bit static MOS RAM with a new memory cell structure has been developed. The memory cell consists of six devices including four MOSFETs and two memory load resistors. Two load resistors are fabricated in the second-level polysilicon films over the polysilicon gate MOSFET used as the driver. Thus the memory cell area is determined only by the area of four MOSFETs. By applying the new cell structure and photolithography technology of 3 /spl mu/m dimensions, the cell area of 23/spl times/27 /spl mu/m and the chip area of 3.75/spl times/4.19 mm have been realized. The RAM is nonclocked and single 5 V operation. Access time of about 150 ns is obtained at a supply current of 120 mA.
Keywords
Field effect integrated circuits; Integrated memory circuits; Random-access storage; field effect integrated circuits; integrated memory circuits; random-access storage; Aluminum; Fabrication; Flip-flops; MOSFET circuits; Metallization; Random access memory; Read-write memory; Resistors; Substrates; Voltage control;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1980.1051363
Filename
1051363
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