DocumentCode
889243
Title
A General Etching Simulator for VLSI Lithography and Etching Processes: Part II - Application to Deposition and Etching
Author
Oldham, William G. ; Neureuther, Andrew R. ; Sung, Chiakang ; Reynolds, John L. ; Nandgaonkar, Sharad Narayan
Volume
15
Issue
4
fYear
1980
Firstpage
520
Lastpage
524
Abstract
The extension of the general process simulator SAMPLE to plasma etching and metallization is described. The etching algorithm is divided into isotropic, anisotropic, and direct milling components and is suitable for modeling wet etching, plasma etching, reactive ion etching, and ion milling. Separate deposition algorithms are used for CVD, sputtering, and planetary deposition. With the extension, it is possible to use a simple keyword repertoire to simulate a sequence of photo-lithography, etching, and deposition steps to obtain device cross sections at each stage of fabrication.
Keywords
Digital simulation; Electronic engineering computing; Integrated circuit technology; Large scale integration; Metallisation; Photolithography; Sputter etching; Vapour deposited coatings; Anisotropic magnetoresistance; Lithography; Metallization; Milling; Plasma applications; Plasma devices; Plasma simulation; Sputter etching; Very large scale integration; Wet etching;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1980.1051432
Filename
1051432
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