Title :
A 1-Mbit Full-Wafer MOS RAM
Author :
Egawa, Yutaka ; Wada, Tsutome ; Ohmori, Yasuo ; Tsuda, Nobuo ; Masuda, Kiyoshi
Abstract :
A 3-in-diameter MOS RAM wafer with 1.256-Mbit net capacity has been designed. It is organized as two independent 32K word X 20 bit memories. Each 32K word memory comprises forty-six 20-kbit storage units, which, whether defective or not, are permanently connected to both buses and the power supply. Bit substitution and 32-word block substitution are used to counteract defects in storage units, and each wafer uses a combination of counter-measures against defects in its peripheral part. Fabricated RAM wafers showed 400-ns typical access time and 4.7-W power consumption at a 600-ns cycle time.
Keywords :
Field effect integrated circuits; Integrated circuit technology; Integrated memory circuits; Random-access storage; Coatings; Electron devices; Fault tolerance; Integrated circuit interconnections; MOSFET circuits; Power supplies; Random access memory; Read-write memory; Solid state circuits; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1980.1051455
