• DocumentCode
    889819
  • Title

    An 18K bipolar dynamic random access memory

  • Author

    Penoyer, Ralph F. ; El-kareh, Badih ; Houghton, Russell J. ; Lane, Paul K. ; Selfridge, Ted A.

  • Volume
    15
  • Issue
    5
  • fYear
    1980
  • Firstpage
    861
  • Lastpage
    865
  • Abstract
    A 2K/spl times/9 bipolar dynamic random access memory (RAM) experimental chip is described with a 75 ns and 300 ns access and cycle time, respectively. The design is based on a two device cell of 800 /spl mu/m/SUP 2/ size. All chip input and output signals are TTL compatible.
  • Keywords
    Bipolar integrated circuits; Integrated memory circuits; Random-access storage; bipolar integrated circuits; integrated memory circuits; random-access storage; Art; Biographies; CMOS process; DRAM chips; Electron devices; MOS devices; Microprocessors; Read-write memory; Semiconductor memory; Solid state circuits;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.1980.1051483
  • Filename
    1051483
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=889819