Title :
A Nonbulk Addition Technique for Associative Processors
Author :
Yau, S.S. ; Yang, C.C.
Author_Institution :
Information-Processing and Control Systems Laboratory and Department of Electrical Engineering, Northwestern University, Evanston, Ill.
Abstract :
A process is described for continuing adaptation, after hyperplanes that separate pattern classes in pattern space have been found, in order to increase the distance between sample patterns and hyperplanes.
Keywords :
Arithmetic; Associative memory; Boolean functions; Hardware; Logic; Network synthesis; Silicon carbide; Software performance; Sufficient conditions; Testing;
Journal_Title :
Electronic Computers, IEEE Transactions on
DOI :
10.1109/PGEC.1966.264483
