Title :
Test algorithms for double-buffered random access and pointer-addressed memories
Author :
Van Sas, Jos ; Catthoor, Francky ; De Man, Hugo J.
fDate :
6/1/1993 12:00:00 AM
Abstract :
Test algorithms for static double-buffered RAMs and pointer-addressed memories (PAMs) are presented. The reasons why test algorithms for single-buffered memories are inadequate to test double-buffered memories (DBMs) are discussed. To obtain a realistic fault model, the authors perform an inductive fault analysis on the DBM cells. They also show that the address generation method imposes different requirements on the test algorithms.<>
Keywords :
SRAM chips; integrated circuit testing; integrated memory circuits; DBM cells; PAMs; address generation method; double-buffered memories; double-buffered random access; fault model; inductive fault analysis; pointer-addressed memories; static double-buffered RAMs; test algorithms; Application software; Decoding; Digital signal processing; Digital signal processing chips; Master-slave; Read-write memory; Signal processing algorithms; Signal synthesis; Telecommunication computing; Testing;
Journal_Title :
Design & Test of Computers, IEEE
