DocumentCode
890008
Title
Interconnect rise time in superconducting integrated circuits
Author
Preis, D. ; Shlager, K.
Author_Institution
Dept. of Electr. Eng., Tufts Univ., Medford, MA, USA
Volume
35
Issue
11
fYear
1988
Firstpage
1463
Lastpage
1465
Abstract
The influence of resistive losses on the voltage risetime of an integrated-circuit interconnection is reported. A distributed-circuit model is used to represent the interconnect. Numerous parametric curves are presented based on numerical evaluation of the exact analytical expression for the model´s transient response. For the superconducting case in which the series resistance of the interconnect approaches zero, the step-response risetime is longer but signal strength increases significantly. Shunt conductance is also shown to affect the risetime. The relationships between the model´s parameters and integrated-circuit geometry and material properties are discussed.<>
Keywords
VLSI; delays; distributed parameter networks; integrated circuits; losses; metallisation; step response; superconducting devices; transient response; transmission line theory; IC; distributed-circuit model; integrated-circuit geometry; integrated-circuit interconnection; interconnect rise time; material properties; propagation delay; resistive losses; shunt conductance; signal strength; step-response risetime; superconducting integrated circuits; transient response; voltage risetime; Geometry; Integrated circuit interconnections; Material properties; Solid modeling; Superconducting integrated circuits; Transient response; Voltage;
fLanguage
English
Journal_Title
Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0098-4094
Type
jour
DOI
10.1109/31.14476
Filename
14476
Link To Document