A voltage-type single-gate CID readout: read and clear-analysis, modeling, and experiment

The read-and-clear technique for a single-gate charge-injection-device (CID) array that eliminates the readout lag in the voltage-type sensing mode is discussed. The readout physical mechanisms along with characteristics of the device as a photon detector are analyzed based on a piecewise linear charge-voltage (Q-V) model. The readout scheme decouples the function of CID readout from that of refreshing the pixel storage capacity following injection pulses. Consequently, readout lag is eliminated, and a low-noise equivalent charge through minimized readout capacitance is achieved. In addition, the scheme facilitates a simple implementation of background charge skimming. Empirical results on an InSb CID linear array that in good agreement with theoretical predictions are presented